1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor device, and more particularly, to a trench isolation method in a flash memory device.
2. Discussion of the Related Art
Lately, an isolated distance between devices becomes shorter than ever according to the tendency of high integration of a semiconductor device. For the device isolation impossible for the conventional LOCOS (local oxidation of silicon) to achieve, trench isolation is used worldwide. Trench isolation is a method of isolating devices from each other in a manner of forming a trench in a semiconductor substrate and filling the trench with insulator such as silicon oxide and the like. Trench isolation is applicable to a flash memory device. Yet, such a characteristic of the flash memory device as retention and cycling depends on a thinnest part of a tunnel oxide layer and a thickness of the tunnel oxide layer is affected by a trench isolation manner.
Specifically, trench isolation in a flash memory device is carried out in a following manner.
First of all, a pad oxide layer pattern, a nitride layer pattern, and a TEOS oxide layer pattern are stacked on a silicon substrate to configure a mask layer pattern.
An etch process is carried out on the silicon substrate using the mask layer pattern as an etch mask to remove an exposed portion of the silicon substrate, thereby forming a trench in the silicon substrate.
After oxidation has been carried out on a surface of the trench, a nitride layer liner is formed over the silicon substrate.
And, the trench is filled up with a high density plasma oxide layer.
The high density plasma oxide layer is planarized to expose a surface of the nitride layer pattern.
Finally, the nitride pattern and the pad oxide layer pattern are removed to complete a trench isolation layer, which is shown in FIG. 1.
Referring to FIG. 1, the trench 102 provided to a device isolation area of the silicon substrate 100 is filled up with the high density plasma oxide layer 104 that electrically isolates an active area of the silicon substrate 100.
After completion of the trench isolation, the pad oxide layer 106 is formed on the active area.
However, in the related art method, the pad oxide layer 106 is formed relatively thinner on an edge A of the trench isolation layer 104. Specifically, since an electric field is intensively focused on the edge A of the trench isolation layer 104, the uneven configuration of the pad oxide layer 106 degrades stability and reliability of the device.